RIOS-Lab Posted on 12/06/2023 RIOS Lab student Yifei Zhu was invited to give a talk on GreenRio: A Linux-Compatible RISC-V Processor Designed for Open-Source EDA Implementations at RISC-V Summit Europe. She introduced the background and shared her experience on this project. Fig.1 Yifei Zhu gave a talk at RISC-V Summit Europe Fig.3 Group photo of … Continue reading RIOS Lab Student was Invited to Give a Talk at RISC-V Summit Europe
RIOS Lab students won the 1st place in the first “Code-A-Chip” competition of ISSCC 2023!
RIOS released the vector Extended instruction set standard at the RISC-V International Foundation Annual Summit
RISC-V Academic Seminar
RISC 40th Anniversary Exhibition
The first workshop will cover topics that address the policies of open source technology, open source patent and licensing strategies, legal matters on OSH intellectual property transfer, and new unified open source licenses covering software, hardware, and data.
In November 2019, the RISC-V International Open Source Laboratory (RIOS Lab) was officially unveiled. Under the leadership of 2017 A.M. Turing Award winner Prof. David A. Patterson and operational support from TBSI, RIOS Lab will conduct cutting-edge research in RISC-V hardware and software technology. Patterson first proposed the Reduced Instruction Set Computer (RISC), an open and free instruction set architecture enabling a new era of processor innovation through open standard collaboration. Released in 2010, the latest Fifth Generation RISC has gained worldwide attention.
The name for the lab RIOS is also inspired by the Spanish word for “rivers.” It symbolizes the flow of information from many sources, coming together to create a whole that is greater than the sum of its parts.