Weiwei Chen

Weiwei Chen

Research Ccientist of RIOS-Lab


Associate professor, supervisor of postgraduate, former member of Youth Innovation Promotion Association of Chinese Academy of Sciences Senior member of the Optical Engineering Society of China

Expert of the Zhongguancun Cloud Computing Industry Alliance Former chief scientist of artificial intelligence company (CTO level), and former first leader of the 3D NAND chip design team of China. 20+ years of IC industry experience, 7+ years of AI industry experience, led the team to complete 30+ chip/IP core design, served as the technical leader of 5+ National Major Projects, and supervised 30+ students. 70+ Patents(CN and US), software copyrights and articles.

Research Interests

Main research interests for computing in memory chip architecture and design technology, AI chip design nano-memory IC design methodology, and EDA design methodology

Honors and Title

  • Senior member of the Optical Engineering Society of China
  • Expert of Zhongguancun Cloud Computing Industry Alliance
  • Expert of the Intelligent Computing Industry Technology Innovation Consortium
  • Former member of Youth Innovation Promotion Association of Chinese Academy of Sciences
  • Top 10 Scientific Researchers (IMECAS)

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Education


Bachelor of Electronic Science and Technology, Department of Electronics Engineering, Tsinghua University

M.S. in Microelectronics, Tsinghua University, Institute of Microelectronics

PhD in Microelectronics, University of Chinese Academy of Sciences, Institute of Microelectronics

Lei Ren

Lei Ren

Research Scientist in RIOS Lab


He graduated from Department of Physics at Peking University in 2004 with B.Sc. degree and excellent achievements, during which he was granted Chun-Tsung fellowship and performed initial research on semiconductor nanowire devices successfully as an undergraduate student under its support. He graduated from the Applied Physics program in Department of Electrical and Computer Engineering at Rice University in 2011 with Ph.D. degree. There he performed thorough research on opto-electrical properties of carbon nanoscale devices and their potential applications on computer systems and terahertz optical frequency range, and published multiple high-quality first-author papers on top SCI journals, such as Physical Review B and Nano Letters. He successfully invented carbon nanotube terahertz polarizer, and completed the opto-electrical characterizations on highly aligned single-wall carbon nanotubes, and then laid their groundwork for their potential device applications in computer hardware systems. He was one of the last-class students of the carbon nanotechnology pioneer, Dr. Richard E. Smalley, the 1996 Nobel laureate. He full-time worked in the top technology companies in the energy industry and high-precision optics industry in USA after his Ph.D. graduation until 2022 summer, thereafter he came back to China and started the new career as a research scientist at the RISC-V international open-source laboratory (RIOS Lab) in Tsinghua-Berkeley Shenzhen Institute (TBSI), with research areas focused on semiconductor microprocessor open-source EDA, semiconductor nanoscale device modeling and its multi-physics, and hardware open-source legal patent AI classifications.

Research Interests

Semiconductor microprocessor open-source EDA, Semiconductor nanoscale device modeling and its multi-physics, Hardware open-source legal patent AI classifications

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Education


Peking University, Bechlor 2000-2004

Rice University, Doctor, 2004-2011

Zhangxi Tan

Zhangxi Tan

Co-Director


Dr. Zhangxi Tan is the Co-Director of the RISC-V International Open-Source Laboratory (RIOS Lab) at Tsinghua-Berkeley Shenzhen Institute (TBSI), and serves as Adjunct Professor, who specializes in computer architecture and VLSI designs. Additionally, Dr. Tan is also the Founder and President of RiVAI Technologies Co. LTD.

Prior to these roles, Dr. Tan joined Pure Storage (NYSE: PSTG) as the company’s first chip designer, where he held leadership roles as a Founding Engineer and Lead Designer. Dr. Tan successfully guided the delivery of the award-winning product (AI Summit 2017, San Francisco), FlashBladeTM, which he grew from infancy to a matured product yields hundreds of million-dollars revenues every year, customers were including: Tesla, Mercedes F1 Racing Team, and Riot Games.

Dr. Tan holds more than 20 US patents in flash storage systems and hardware accelerators, and he is also the inventor of the FPGA-based architecture simulator (RAMP Gold). Dr. Tan has Bachelor and Master degrees in electrical engineering and computer science from Tsinghua University; Master and PhD degrees in computer science from University of California, Berkeley, where he was supervised by Prof. David Patterson, the 2017 Turing Award winner for inventing the reduced instruction set computer (RISC) approach.

Research Interests

My primary research is computer architecture and networks, microprocessor and VLSI designs, open-source RISC-V technologies and ecosystems, OpenEDA and PDK, non-volatile memory systems, SW/HW co-design, implementation of computer systems and generative AI on chip designs. 

Graduate Techings

Readings in Computer Systems, TBSI                                 2020 – 2023

Advanced Micro Processor Processor Design, TBSI                     2020 – 2023

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Education


1998.9 – 2002.7 Department of Electronic Engineering, Tsinghua University, China

2002.9 – 2005.1 Department of Computer Science and Technology, Tsinghua University, China

2005.8 – 2013.7 Computer Science Division, University of California, Berkeley, CA 94720

PhD in Computer Science, minor in Management of Technology

2013.7 – 2013.10 Computer Science Division, University of California, Berkeley, CA 94720

Postdoc Researcher in the ASPIRE lab (aspire.eecs.berkeley.edu)

David· A· Patterson

David· A· Patterson

Director of RIOS Lab


David Patterson is the Pardee Professor of Computer Science, Emeritus at the University of California at Berkeley, which he joined after graduating from UCLA in 1976.

Dave’s research style is to identify critical questions for the IT industry and gather inter-disciplinary groups of faculty and graduate students to answer them. The answer is typically embodied in demonstration systems, and these demonstration systems are later mirrored in commercial products. In addition to research impact, these projects train leaders of our field. The best known projects were Reduced Instruction Set Computers (RISC), Redundant Array of Inexpensive Disks (RAID), and Networks of Workstations (NOW), each of which helped lead to billion dollar industries.

A measure of the success of projects is the list of awards won by Patterson and as his teammates: the ACM A.M. Turing Award, the C & C Prize, the IEEE von Neumann Medal, the IEEE Johnson Storage Award, the SIGMOD Test of Time award, the ACM-IEEE Eckert-Mauchly Award, and the Katayanagi Prize. He was also elected to both AAAS societies, the National Academy of Engineering, the National Academy of Sciences, the Silicon Valley Engineering Hall of Fame, and to be a Fellow of the Computer History Museum. The full list includes about 40 awards for research, teaching, and service.

In his spare time he coauthored seven books—including two with John Hennessy who is past President of Stanford University and with whom he shared the Turing Award— Patterson also served as Chair of the Computer Science Division at UC Berkeley, Chair of the Computing Research Association, and President of ACM. He is currently Vice-Chair of the Board of Directors of the RISC-V Foundation.

Research Interests

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Education


  1. 1976, PhD, Computer Science, UCLA
  2. 1970, MS, Computer Science, UCLA
  3. 1969, AB, Mathematics, UCLA